A cross-point memory comprises one or more memory cells arranged in an array. Each memory cell is coupled to a bit line (BL) and a word line (WL). Typically, the bit lines comprise a set of substantially parallel electrically conductive traces that are formed in a first horizontal plane, and the word lines are another set of substantially parallel electrically conductive traces that are formed in a second horizontal plane. The bit lines extend in a first direction and the word lines extend in a second direction so that the bit lines and the word lines appear to intersect when viewed from above the first and second horizontal planes. A memory cell is located at each crossing point of the bit lines and the word lines in an intersection region that is vertically spaced between the bit lines and the word lines. Typically, a particular memory cell is selected by applying a voltage to the bit line and a voltage to the word line that are coupled to the memory cell.
It will be appreciated that for simplicity and/or clarity of illustration, elements depicted in the figures have not, necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. The scaling of the figures does not represent precise dimensions and/or dimensional ratios of the various elements depicted herein. Further, if considered appropriate, reference numerals have been repeated among the figures to indicate corresponding and/or analogous elements.